Axel Jantsch

This is an introductory textbook for courses in Synchronous Digital Design that enables students to develop useful intuitions for all of the key concepts of digital design.

This is an introductory textbook for courses in Synchronous Digital Design that enables students to develop useful intuitions for all of the key concepts of digital design. The author focuses this tutorial on the design flow, which is introduced as an iterative cycle of Analysis, Improvement, Modeling, and Synthesis. All the basic elements of digital design are covered, starting with the CMOS transistor to provide an abstraction upon which everything else is built. The other main foundational concepts introduced are clocked synchronous register-transfer level design, datapath, finite state machines and communication between clock domains.

Resource management has a long history in computing, from the early days of time-shared machines with pioneering fundamental work on run-time systems, distributed systems, real-time operating systems and middleware. The longevity and fundamental importance of the topic has resulted in an incredibly large body of work for on-chip resource management in the past two decades. The possible combinations of sub-topics and variations in the assumptions, use of different terminology, metrics, goals, and use-cases, leaves anyone attempting to review the literature overwhelmed.On-Chip Dynamic Resource Management is the first comprehensive and coherent review of all aspects of on-chip run-time resource management designed to facilitate understanding of recent trends in dynamic and adaptive strategies. The authors provide the reader with a framework within which they can navigate both existing, as well as evolving research efforts in on-chip dynamic resource management.Written by leading experts in the field, researchers and students are provided a structured review and discussion of the state of the art that is divided along the primary objectives of resource management techniques: performance, power, reliability and quality of service.

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.

This book covers key concepts in the design of 2D and 3D Network-on-Chip interconnect. It highlights design challenges and discusses fundamentals of NoC technology, including architectures, algorithms and tools. Coverage focuses on topology exploration for both 2D and 3D NoCs, routing algorithms, NoC router design, NoC-based system integration, verification and testing, and NoC reliability. Case studies are used to illuminate new design methodologies.