Brajesh Kumar Kaushik

Comprehensive resource covering new technologies, materials, strategies, and recent advancements in the field of biosensing Biosensors summarizes cutting-edge technologies in biosensing, including gene editing (known as Clustered Regularly Interspaced Short Palindromic Repeat or CRISPR), quorum sensing utilizing inter and intra cell signals, two-dimensional (2D) materials and aptamer-mediated sensor designs, and more, with additional coverage of the latest materials, strategies, and advancements made in the field. Chapters are categorized on the basis of various bio-recognition elements that include aptamer, nucleic acid, enzymes, antibodies, bacteriophages, peptides, and molecular imprinted polymers. Plasmonic, surface-enhanced Raman scattering, colorimetric, fluorescence, electrochemical, magneto and piezo-electric biosensor sensing techniques are also considered. The roles of various nanomaterials, advancement in synthesis, signal enhancement strategies, and new trends for biomedical applications are also described. Current challenges, limitations, and future prospects to developing biosensors for point-of-care and clinical applications are also discussed. Written by three highly qualified authors, Biosensors includes information on: Diverse bio-receptors include nucleic acids, aptamers, enzymes, antibodies, bacteriophages, molecularly imprinted polymers, whole-cell, and techniques of immobilizationDifferent transduction principles using bio-receptors (e.g., optical, electrochemical, piezo-electrical, and SERS) to detect microorganism, toxins, and diseasesNanomaterials synthesis, their role in biosensing, pros and cons of carbon, polymer, metals, metal oxides, and quantum dots-based nanomaterials in medical biosensing applications Biosensors is a comprehensive and complete resource on the subject for researchers and professionals in physics, chemistry, and biomedical science, research communities working in the fields of plasmonics, optics, biosensors, and nano-photonics, and students in related programs of study.

Focussing on micro- and nanoelectronics design and technology, this book provides thorough analysis and demonstration, starting from semiconductor devices to VLSI fabrication, designing (analog and digital), on-chip interconnect modeling culminating with emerging non-silicon/ nano devices. It gives detailed description of both theoretical as well as industry standard HSPICE, Verilog, Cadence simulation based real-time modeling approach with focus on fabrication of bulk and nano-devices. Each chapter of this proposed title starts with a brief introduction of the presented topic and ends with a summary indicating the futuristic aspect including practice questions. Aimed at researchers and senior undergraduate/graduate students in electrical and electronics engineering, microelectronics, nanoelectronics and nanotechnology, this book: Provides broad and comprehensive coverage from Microelectronics to Nanoelectronics including design in analog and digital electronics. Includes HDL, and VLSI design going into the nanoelectronics arena. Discusses devices, circuit analysis, design methodology, and real-time simulation based on industry standard HSPICE tool. Explores emerging devices such as FinFETs, Tunnel FETs (TFETs) and CNTFETs including their circuit co-designing.Covers real time illustration using industry standard Verilog, Cadence and Synopsys simulations.

Focussing on micro- and nanoelectronics design and technology, this book provides thorough analysis and demonstration, starting from semiconductor devices to VLSI fabrication, designing (analog and digital), on-chip interconnect modeling culminating with emerging non-silicon/ nano devices. It gives detailed description of both theoretical as well as industry standard HSPICE, Verilog, Cadence simulation based real-time modeling approach with focus on fabrication of bulk and nano-devices. Each chapter of this proposed title starts with a brief introduction of the presented topic and ends with a summary indicating the futuristic aspect including practice questions. Aimed at researchers and senior undergraduate/graduate students in electrical and electronics engineering, microelectronics, nanoelectronics and nanotechnology, this book: Provides broad and comprehensive coverage from Microelectronics to Nanoelectronics including design in analog and digital electronics. Includes HDL, and VLSI design going into the nanoelectronics arena. Discusses devices, circuit analysis, design methodology, and real-time simulation based on industry standard HSPICE tool. Explores emerging devices such as FinFETs, Tunnel FETs (TFETs) and CNTFETs including their circuit co-designing.Covers real time illustration using industry standard Verilog, Cadence and Synopsys simulations.

Recent advances in semiconductor technology offer vertical interconnect access (via) that extend through silicon, popularly known as through silicon via (TSV). This book provides a comprehensive review of the theory behind TSVs while covering most recent advancements in materials, models and designs. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for Cu, carbon nanotube (CNT) and graphene nanoribbon (GNR) based TSVs are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR based TSVs are also discussed.

Text provides information about advanced OTFT (Organic thin film transistor) structures, their modeling and extraction of performance parameters, materials of individual layers, their molecular structures, basics of pi-conjugated semiconducting materials and their properties, OTFT charge transport phenomena and fabrication techniques. It includes applications of OTFTs such as single and dual gate OTFT based inverter circuits along with bootstrap techniques, SRAM cell designs based on different material and circuit configurations, light emitting diodes (LEDs). Besides this, application of dual gate OTFT in the logic gate, shift register, Flip-Flop, counter circuits will be included as well.

The primary aim of this book is to discuss various aspects of nanoscale device design and their applications including transport mechanism, modeling, and circuit applications. .Provides a platform for modeling and analysis of state-of-the-art devices in nanoscale regime, reviews issues related to optimizing the sub-nanometer device performance and addresses simulation aspect and/or fabrication process of devicesAlso, includes design problems at the end of each chapter

This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

The primary aim of this book is to discuss various aspects of nanoscale device design and their applications including transport mechanism, modeling, and circuit applications. .Provides a platform for modeling and analysis of state-of-the-art devices in nanoscale regime, reviews issues related to optimizing the sub-nanometer device performance and addresses simulation aspect and/or fabrication process of devicesAlso, includes design problems at the end of each chapter

This book focusses on the spacer engineering aspects of novel MOS-based device–circuit co-design in sub-20nm technology node, its process complexity, variability, and reliability issues. It comprehensively explores the FinFET/tri-gate architectures with their circuit/SRAM suitability and tolerance to random statistical variations.

This book offers detailed insights into spin transfer torque (STT) based devices, circuits and memories. Starting with the basic concepts and device physics, it then addresses advanced STT applications and discusses the outlook for this cutting-edge technology. It also describes the architectures, performance parameters, fabrication, and the prospects of STT based devices. Further, moving from the device to the system perspective it presents a non-volatile computing architecture composed of STT based magneto-resistive and all-spin logic devices and demonstrates that efficient STT based magneto-resistive and all-spin logic devices can turn the dream of instant on/off non-volatile computing into reality.

Recent advances in semiconductor technology offer vertical interconnect access (via) that extend through silicon, popularly known as through silicon via (TSV). This book provides a comprehensive review of the theory behind TSVs while covering most recent advancements in materials, models and designs. Furthermore, depending on the geometry and physical configurations, different electrical equivalent models for Cu, carbon nanotube (CNT) and graphene nanoribbon (GNR) based TSVs are presented. Based on the electrical equivalent models the performance comparison among the Cu, CNT and GNR based TSVs are also discussed.

Text provides information about advanced OTFT (Organic thin film transistor) structures, their modeling and extraction of performance parameters, materials of individual layers, their molecular structures, basics of pi-conjugated semiconducting materials and their properties, OTFT charge transport phenomena and fabrication techniques. It includes applications of OTFTs such as single and dual gate OTFT based inverter circuits along with bootstrap techniques, SRAM cell designs based on different material and circuit configurations, light emitting diodes (LEDs). Besides this, application of dual gate OTFT in the logic gate, shift register, Flip-Flop, counter circuits will be included as well.

The brief primarily focuses on the performance analysis of CNT based interconnects in current research scenario. Different CNT structures are modeled on the basis of transmission line theory. Performance comparison for different CNT structures illustrates that CNTs are more promising than Cu or other materials used in global VLSI interconnects. The brief is organized into five chapters which mainly discuss: (1) an overview of current research scenario and basics of interconnects; (2) unique crystal structures and the basics of physical properties of CNTs, and the production, purification and applications of CNTs; (3) a brief technical review, the geometry and equivalent RLC parameters for different single and bundled CNT structures; (4) a comparative analysis of crosstalk and delay for different single and bundled CNT structures; and (5) various unique mixed CNT bundle structures and their equivalent electrical models.