Dusan Milosevic

This book describes the PREMISS system, which enables readers to overcome the limitations of state-of-the-art battery-less wireless sensors in size, cost, robustness and range, with a system concept for a 60 GHz wireless sensor system with monolithic sensors. The authors demonstrate a system in which the wireless sensors consist of wireless power receiving, sensing and communication functions in a single chip, without external components, avoiding costly IC-interfaces that are sensitive to mechanical and thermal stress.

This book describes the PREMISS system, which enables readers to overcome the limitations of state-of-the-art battery-less wireless sensors in size, cost, robustness and range, with a system concept for a 60 GHz wireless sensor system with monolithic sensors. The authors demonstrate a system in which the wireless sensors consist of wireless power receiving, sensing and communication functions in a single chip, without external components, avoiding costly IC-interfaces that are sensitive to mechanical and thermal stress.

This book presents the cross-layer design and optimization of wake-up receivers for wireless body area networks (WBAN), with an emphasis on low-power circuit design. This includes the analysis of medium access control (MAC) protocols, mixer-first receiver design, and implications of receiver impairments on wideband frequency-shift-keying (FSK) receivers. Readers will learn how the overall power consumption is reduced by exploiting the characteristics of body area networks. Theoretical models presented are validated with two different receiver implementations, in 90nm and 40nm CMOS technology.

This book presents the cross-layer design and optimization of wake-up receivers for wireless body area networks (WBAN), with an emphasis on low-power circuit design. This includes the analysis of medium access control (MAC) protocols, mixer-first receiver design, and implications of receiver impairments on wideband frequency-shift-keying (FSK) receivers. Readers will learn how the overall power consumption is reduced by exploiting the characteristics of body area networks. Theoretical models presented are validated with two different receiver implementations, in 90nm and 40nm CMOS technology.