Jan Craninckx

This book covers analysis and design of PLL-based frequency modulators, used in the hearth of modern FMCW radars. The desired radar performance targets are translated into the modulator specifications first. The authors then focus on describing the optimal modulator architecture, with special care given to core building blocks of the system. The central analog building block described is a novel charge integrating-based chirp generator, which breaks limits of similar art in the field where performance (noise, area) is typically traded for power. The book then continues to describe power-efficient, mixed-signal background calibration engine implementation, which when applied in context of the presented system, ensures pristine linearity of the generated chirps. The detailed design guide shows how robust duty-cycling can be enabled, to ensure low-power consumption of the system, without compromise in radar performance. A complete overview of all circuit-level building blocks is provided, to ensure that readers can tackle every aspect of the system. Finally, the book covers description of a rigorous chirp-linearity and phase-noise performance characterization methodology, critical for evaluation of radar system performance metrics. This book provides insightful design guidelines for DTC-based fractional-N PLL synthesizers and QDAC-based FMCW frequency modulators for both academic researchers and industry IC design engineers.

This book covers analysis and design of PLL-based frequency modulators, used in the hearth of modern FMCW radars. The desired radar performance targets are translated into the modulator specifications first. The authors then focus on describing the optimal modulator architecture, with special care given to core building blocks of the system. The central analog building block described is a novel charge integrating-based chirp generator, which breaks limits of similar art in the field where performance (noise, area) is typically traded for power. The book then continues to describe power-efficient, mixed-signal background calibration engine implementation, which when applied in context of the presented system, ensures pristine linearity of the generated chirps. The detailed design guide shows how robust duty-cycling can be enabled, to ensure low-power consumption of the system, without compromise in radar performance. A complete overview of all circuit-level building blocks is provided, to ensure that readers can tackle every aspect of the system. Finally, the book covers description of a rigorous chirp-linearity and phase-noise performance characterization methodology, critical for evaluation of radar system performance metrics. This book provides insightful design guidelines for DTC-based fractional-N PLL synthesizers and QDAC-based FMCW frequency modulators for both academic researchers and industry IC design engineers.

This book explains concepts behind fractional subsampling-based frequency synthesis that is re-shaping today’s art in the field of low-noise LO generation. It covers advanced material, giving clear guidance for development of background-calibrated environments capable of spur-free synthesis and wideband phase modulation. It further expands the concepts into the field of subsampling polar transmission, where the newly developed architecture enables unprecedented spectral efficiency levels, unquestionably required by the upcoming generation of wireless standards.

This book introduces a completely novel architecture that can relax the trade-off existing today between noise, power and area consumption in a very suitable solution for advanced wireless communication systems. Through the combination of charge-domain operation with incremental signaling, this architecture gives the best of both worlds, providing the reduced area and high portability of digital-intensive architectures with an improved out-of-band noise performance given by intrinsic noise filtering capabilities. Readers will be enabled to design higher performance radio front-ends that consume less power and area, especially with respect to the transmitter and power amplifier designs, considered by many the “battery killers” on most mobile devices.

This book introduces a completely novel architecture that can relax the trade-off existing today between noise, power and area consumption in a very suitable solution for advanced wireless communication systems. Through the combination of charge-domain operation with incremental signaling, this architecture gives the best of both worlds, providing the reduced area and high portability of digital-intensive architectures with an improved out-of-band noise performance given by intrinsic noise filtering capabilities. Readers will be enabled to design higher performance radio front-ends that consume less power and area, especially with respect to the transmitter and power amplifier designs, considered by many the “battery killers” on most mobile devices.

By the end of this decade, a 4G wireless terminal will be available that provides high quality multimedia, personalized services, and ubiquitous multi-standard broadband connectivity with a reasonable power consumption. In this context, a multi-band transceiver is needed that provides a high-level of programmability while keeping low design complexity and costs. Software Defined Radio (SDR) is the most promising technology to implement such a terminal as it enables multi-mode reception by tuning to any frequency band, by selecting any channel bandwidth, and by detecting any modulation. Baseband Analog Circuits for Software Defined Radio aims to describe the transition towards a Software Radio from the analog design perspective. As the original idea of a "full-digital" Software Radio is far from the state-of-art, an analog front-end is still needed to achieve a feasible implementation. Most of the existent front-end architectures are explored from the flexibility point of view. A complete overview of the actual state-of-art for reconfigurable transceivers is given in detail, focusing on the challenges imposed by flexibility in analog design. As far as the design of adaptive analog circuits is concerned, specifications like bandwidth, gain, noise, resolution and linearity should be programmable. The development of circuit topologies and architectures that can be easily reconfigured while providing a near optimal power/performance trade-offs is a key challenge. In this book, we tackle this challenge mainly for baseband analog circuits, i.e. amplifiers and filters, proposing efficient solutions that provide a high level of programmability. Measurements results validate the design strategies.

Green Software De?ned Radios, the title of this book may have originated from a lackofinspiration,andthecombinationofhardwork,jetlag,anddrinkinggreentea. The message we want to convey however, is that SDRs are a promising technology for the future, providing they are designed for ef?cient usage of scarce resources: energy and spectrum. In the last years, the R&D teams focusing on wireless c- munication (around the world and at IMEC speci?cally), have realized great bre- throughs. It is our honor, building on this knowledge, to bring a comprehensive overview of the essential technologies. We are grateful that Springer is willing to publish in their collection on radio technologies, a book on green SDRs, a weird species still today, yet maybe the baseline for the day after tomorrow. Dear reader, we wish that you ?nd in the following pages, including the references, some int- esting insights, and that this book may live more or less up to your expectations (and hopefully more than less). Thisbook’sclosingstatesthatthequestforGreenSDRshasnotended,thisisjust the beginning. Concerning this book however, we are happy that today the opposite is true. We want to acknowledge our colleagues at IMEC for their great scienti?c contribution, and even more for the enjoyable cooperation.

Green Software De?ned Radios, the title of this book may have originated from a lackofinspiration,andthecombinationofhardwork,jetlag,anddrinkinggreentea. The message we want to convey however, is that SDRs are a promising technology for the future, providing they are designed for ef?cient usage of scarce resources: energy and spectrum. In the last years, the R&D teams focusing on wireless c- munication (around the world and at IMEC speci?cally), have realized great bre- throughs. It is our honor, building on this knowledge, to bring a comprehensive overview of the essential technologies. We are grateful that Springer is willing to publish in their collection on radio technologies, a book on green SDRs, a weird species still today, yet maybe the baseline for the day after tomorrow. Dear reader, we wish that you ?nd in the following pages, including the references, some int- esting insights, and that this book may live more or less up to your expectations (and hopefully more than less). Thisbook’sclosingstatesthatthequestforGreenSDRshasnotended,thisisjust the beginning. Concerning this book however, we are happy that today the opposite is true. We want to acknowledge our colleagues at IMEC for their great scienti?c contribution, and even more for the enjoyable cooperation.

By the end of this decade, a 4G wireless terminal will be available that provides high quality multimedia, personalized services, and ubiquitous multi-standard broadband connectivity with a reasonable power consumption. In this context, a multi-band transceiver is needed that provides a high-level of programmability while keeping low design complexity and costs. Software Defined Radio (SDR) is the most promising technology to implement such a terminal as it enables multi-mode reception by tuning to any frequency band, by selecting any channel bandwidth, and by detecting any modulation. Baseband Analog Circuits for Software Defined Radio aims to describe the transition towards a Software Radio from the analog design perspective. As the original idea of a "full-digital" Software Radio is far from the state-of-art, an analog front-end is still needed to achieve a feasible implementation. Most of the existent front-end architectures are explored from the flexibility point of view. A complete overview of the actual state-of-art for reconfigurable transceivers is given in detail, focusing on the challenges imposed by flexibility in analog design. As far as the design of adaptive analog circuits is concerned, specifications like bandwidth, gain, noise, resolution and linearity should be programmable. The development of circuit topologies and architectures that can be easily reconfigured while providing a near optimal power/performance trade-offs is a key challenge. In this book, we tackle this challenge mainly for baseband analog circuits, i.e. amplifiers and filters, proposing efficient solutions that provide a high level of programmability. Measurements results validate the design strategies.