Kirjojen hintavertailu. Mukana 12 390 323 kirjaa ja 12 kauppaa.

Kirjailija

Paul Molitor

Kirjat ja teokset yhdessä paikassa: 6 kirjaa, julkaisuja vuosilta 1989-2012, suosituimpien joukossa Einführung in den VLSI-Entwurf. Vertaile teosten hintoja ja tarkista saatavuus suomalaisista kirjakaupoista.

6 kirjaa

Kirjojen julkaisuhaarukka 1989-2012.

Kompaktkurs VHDL

Kompaktkurs VHDL

Paul Molitor; Jörg Ritter

de Gruyter Oldenbourg
2012
sidottu
Das Buch umfasst den Stoff einer einsemestrigen Vorlesung und bietet dem Leser eine leicht verst ndliche und mit vielen interessanten Beispielen unterlegte Einf hrung in die Sprache. Die Autoren verzichten bewusst auf die Erl uterung nur selten benutzter Konstrukte und konzentrieren ihre Darstellung auf die Betrachtung der Sprache unter dem Aspekt der Schaltkreissynthese. Das Buch verbindet Theorie und praktische Anwendungsbeispiele.
Equivalence Checking of Digital Circuits

Equivalence Checking of Digital Circuits

Paul Molitor; Janett Mohnke

Springer-Verlag New York Inc.
2010
nidottu
Hardware veri?cation is the process of checking whether a design conforms to its speci?cations of functionality and timing. In today’s design processes it becomes more and more important. Very large scale integrated (VLSI) circuits and the resulting digital systems have conquered a place in almost all areas of our life, even in security sensitive applications. Complex digital systems control airplanes, have been used in banks and on intensive-care units. Hence, the demand for error-free designs is more important than ever. In addition, economic reasons underline this demand as well. The design and production process of present day VLSI-circuits is highly time- and cost-intensive. Mo- over, it is nearly impossible to repair integrated circuits. Thus, it is desirable to detect design errors early in the design process and not just after producing the prototype chip. All these facts are re?ected by developing and prod- tion statistics of present day companies. For example, In?neon Technologies [118] assumed that about 60% to 80% of the overall design time was spent for veri?cation in 2000. Other sources cite the 3-to-1 head count ratio between veri?cation engineers and logic designers. This shows that verifying logical correctness of the design of hardware systems is a major gate to the problem of time-to-market (cf. [113]). With the chip complexity constantly increasing, the dif?culty as well as the - portance of functional veri?cation of new product designs has been increased. It is not only more important to get error-free designs.
Equivalence Checking of Digital Circuits

Equivalence Checking of Digital Circuits

Paul Molitor; Janett Mohnke

Springer-Verlag New York Inc.
2004
sidottu
Hardware veri?cation is the process of checking whether a design conforms to its speci?cations of functionality and timing. In today’s design processes it becomes more and more important. Very large scale integrated (VLSI) circuits and the resulting digital systems have conquered a place in almost all areas of our life, even in security sensitive applications. Complex digital systems control airplanes, have been used in banks and on intensive-care units. Hence, the demand for error-free designs is more important than ever. In addition, economic reasons underline this demand as well. The design and production process of present day VLSI-circuits is highly time- and cost-intensive. Mo- over, it is nearly impossible to repair integrated circuits. Thus, it is desirable to detect design errors early in the design process and not just after producing the prototype chip. All these facts are re?ected by developing and prod- tion statistics of present day companies. For example, In?neon Technologies [118] assumed that about 60% to 80% of the overall design time was spent for veri?cation in 2000. Other sources cite the 3-to-1 head count ratio between veri?cation engineers and logic designers. This shows that verifying logical correctness of the design of hardware systems is a major gate to the problem of time-to-market (cf. [113]). With the chip complexity constantly increasing, the dif?culty as well as the - portance of functional veri?cation of new product designs has been increased. It is not only more important to get error-free designs.