Swarup Bhunia

Hardware Security: A Hands On Learning Approach, Second Edition provides a broad, comprehensive, and practical overview of hardware security that encompasses all levels of the electronic hardware infrastructure. The book covers basic concepts like advanced attack techniques and countermeasures that are illustrated through theory, case studies, and well designed, hands on laboratory exercises for each key concept. The book is ideal as a textbook for upper level undergraduate students studying computer engineering, computer science, electrical engineering, and biomedical engineering, but is also a handy reference for graduate students, researchers and industry professionals. For academic courses, the book contains a robust suite of teaching ancillaries. Users of the book can access schematic, layout and design files for a printed circuit board for hardware hacking (i.e., the HaHa board), a suite of videos that demonstrate different hardware vulnerabilities, hardware attacks and countermeasures, and a detailed description and user manual for companion materials.

This book offers readers comprehensive coverage of security policy specification using new policy languages, implementation of security policies in Systems-on-Chip (SoC) designs – current industrial practice, as well as emerging approaches to architecting SoC security policies and security policy verification. The authors focus on a promising security architecture for implementing security policies, which satisfies the goals of flexibility, verification, and upgradability from the ground up, including a plug-and-play hardware block in which all policy implementations are enclosed. Using this architecture, they discuss the ramifications of designing SoC security policies, including effects on non-functional properties (power/performance), debug, validation, and upgrade. The authors also describe a systematic approach for “hardware patching”, i.e., upgrading hardware implementations of security requirements safely, reliably, and securely in the field, meeting a critical need for diverse Internet of Things (IoT) devices.Provides comprehensive coverage of SoC security requirements, security policies, languages, and security architecture for current and emerging computing devices;Explodes myths and ambiguities in SoC security policy implementations, and provide a rigorous treatment of the subject;Demonstrates a rigorous, step-by-step approach to developing a diversity of SoC security policies;Introduces a rigorous, disciplined approach to “hardware patching”, i.e., secure technique for updating hardware functionality of computing devices in-field;Includes discussion of current and emerging approaches for security policy verification.

Hardware Security: A Hands-On Learning Approach provides a broad, comprehensive and practical overview of hardware security that encompasses all levels of the electronic hardware infrastructure. It covers basic concepts like advanced attack techniques and countermeasures that are illustrated through theory, case studies and well-designed, hands-on laboratory exercises for each key concept. The book is ideal as a textbook for upper-level undergraduate students studying computer engineering, computer science, electrical engineering, and biomedical engineering, but is also a handy reference for graduate students, researchers and industry professionals. For academic courses, the book contains a robust suite of teaching ancillaries. Users will be able to access schematic, layout and design files for a printed circuit board for hardware hacking (i.e. the HaHa board) that can be used by instructors to fabricate boards, a suite of videos that demonstrate different hardware vulnerabilities, hardware attacks and countermeasures, and a detailed description and user manual for companion materials.

This book offers readers comprehensive coverage of security policy specification using new policy languages, implementation of security policies in Systems-on-Chip (SoC) designs – current industrial practice, as well as emerging approaches to architecting SoC security policies and security policy verification. The authors focus on a promising security architecture for implementing security policies, which satisfies the goals of flexibility, verification, and upgradability from the ground up, including a plug-and-play hardware block in which all policy implementations are enclosed. Using this architecture, they discuss the ramifications of designing SoC security policies, including effects on non-functional properties (power/performance), debug, validation, and upgrade. The authors also describe a systematic approach for “hardware patching”, i.e., upgrading hardware implementations of security requirements safely, reliably, and securely in the field, meeting a critical need for diverse Internet of Things (IoT) devices.Provides comprehensive coverage of SoC security requirements, security policies, languages, and security architecture for current and emerging computing devices;Explodes myths and ambiguities in SoC security policy implementations, and provide a rigorous treatment of the subject;Demonstrates a rigorous, step-by-step approach to developing a diversity of SoC security policies;Introduces a rigorous, disciplined approach to “hardware patching”, i.e., secure technique for updating hardware functionality of computing devices in-field;Includes discussion of current and emerging approaches for security policy verification.

This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms.

This book analyzes energy and reliability as major challenges faced by designers of computing frameworks in the nanometer technology regime. The authors describe the existing solutions to address these challenges and then reveal a new reconfigurable computing platform, which leverages high-density nanoscale memory for both data storage and computation to maximize the energy-efficiency and reliability. The energy and reliability benefits of this new paradigm are illustrated and the design challenges are discussed. Various hardware and software aspects of this exciting computing paradigm are described, particularly with respect to hardware-software co-designed frameworks, where the hardware unit can be reconfigured to mimic diverse application behavior. Finally, the energy-efficiency of the paradigm described is compared with other, well-known reconfigurable computing platforms.