Michiel Steyaert

Design of Multi-Bit Delta-Sigma A/D Converters discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies. Design of Multi-Bit Delta-Sigma A/D Converters starts with a general introduction of the concepts of Delta-Sigma converters. A wide variety of architectures are discussed, ranging from single-loop to cascaded and various multi-bit topologies. These topologies are optimized to obtain stable converters with a high accuracy. A clear overview is provided of the maximum achievable performance of each topology, which allows a designer to select the optimal architecture for a certain specification. Special attention is paid to multi-bit architectures and possible solutions for the linearity problem of the DA converter in the feedback loop of converters. Several circuit design aspects of multi-bit Delta-Sigma converters are discussed. Various models are provided for a wide range of linear and non-linear circuit imperfections, which can degrade the performance of the converter. These models allow the designer to determine the required specifications for the different building blocks and form the basis of a systematic design procedure. The presented material is combined in a concluding chapter, which illustrates the systematic design procedure for two high-performance converters. Design of Multi-Bit Delta-Sigma A/D Converters provides a clear comparison of architectures and yields insight into the influence of the most important circuit non-idealities. It will allow you to design robust and high-performance Delta-Sigma AD converters in a shorter time. It is essential reading for analog design engineers and researchers in the field of AD convertersand it is also suitable as a text for an advanced course on the subject.

Design of Multi-Bit Delta-Sigma A/D Converters discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies. Design of Multi-Bit Delta-Sigma A/D Converters starts with a general introduction of the concepts of Delta-Sigma converters. A wide variety of architectures are discussed, ranging from single-loop to cascaded and various multi-bit topologies. These topologies are optimized to obtain stable converters with a high accuracy. A clear overview is provided of the maximum achievable performance of each topology, which allows a designer to select the optimal architecture for a certain specification. Special attention is paid to multi-bit architectures and possible solutions for the linearity problem of the DA converter in the feedback loop of converters. Several circuit design aspects of multi-bit Delta-Sigma converters are discussed. Various models are provided for a wide range of linear and non-linear circuit imperfections, which can degrade the performance of the converter. These models allow the designer to determine the required specifications for the different building blocks and form the basis of a systematic design procedure. The presented material is combined in a concluding chapter, which illustrates the systematic design procedure for two high-performance converters. Design of Multi-Bit Delta-Sigma A/D Converters provides a clear comparison of architectures and yields insight into the influence of the most important circuit non-idealities. It will allow you to design robust and high-performance Delta-Sigma AD converters in a shorter time. It is essential reading for analog design engineers and researchers in the field of AD convertersand it is also suitable as a text for an advanced course on the subject.

This book gives a detailed analysis of switched-capacitor DC-DC converters that are entirely integrated on a single chip and establishes that these converters are mainly limited by the large parasitic coupling, the low capacitor energy density, and the fact that switched-capacitor converter topologies only have a fixed voltage conversion ratio. The authors introduce the concept of Advanced Multiphasing as a way to circumvent these limitations by having multiple out-of-phase parallel converter cores interact with each other to minimize capacitor charging losses, leading to several techniques that demonstrate record efficiency and power-density, and even a fundamentally new type of switched-capacitor topology that has a continuously-scalable conversion ratio.Provides single-source reference to the recently-developed Advanced Multiphasing concept;Enables greatly improved performance and capabilities in fully integrated switched-capacitor converters;Enables readers to design DC-DC converters, where multiple converter cores are put in parallel and actively interact with each other over several phases to improve their capabilities.

This book gives a detailed analysis of switched-capacitor DC-DC converters that are entirely integrated on a single chip and establishes that these converters are mainly limited by the large parasitic coupling, the low capacitor energy density, and the fact that switched-capacitor converter topologies only have a fixed voltage conversion ratio. The authors introduce the concept of Advanced Multiphasing as a way to circumvent these limitations by having multiple out-of-phase parallel converter cores interact with each other to minimize capacitor charging losses, leading to several techniques that demonstrate record efficiency and power-density, and even a fundamentally new type of switched-capacitor topology that has a continuously-scalable conversion ratio.Provides single-source reference to the recently-developed Advanced Multiphasing concept;Enables greatly improved performance and capabilities in fully integrated switched-capacitor converters;Enables readers to design DC-DC converters, where multiple converter cores are put in parallel and actively interact with each other over several phases to improve their capabilities.

This book presents state-of-the-art techniques for radiation hardened high-resolution Time-to-Digital converters and low noise frequency synthesizers. Throughout the book, advanced degradation mechanisms and error sources are discussed and several ways to prevent such errors are presented. An overview of the prerequisite physics of nuclear interactions is given that has been compiled in an easy to understand chapter. The book is structured in a way that different hardening techniques and solutions are supported by theory and experimental data with their various tradeoffs.Based on leading-edge research, conducted in collaboration between KU Leuven and CERN, the European Center for Nuclear ResearchDescribes in detail advanced techniques to harden circuits against ionizing radiationProvides a practical way to learn and understand radiation effects in time-based circuitsIncludes an introduction to the underlying physics, circuitdesign, and advanced techniques accompanied with experimental data

This book describes synergetic innovation opportunities offered by combining the field of power conversion with the field of integrated circuit (IC) design. The authors demonstrate how integrating circuits enables increased operation frequency, which can be exploited in power converters to reduce drastically the size of the discrete passive components. The authors introduce multiple power converter circuits, which are very compact as result of their high level of integration. First, the limits of high-power-density low-voltage monolithic switched-capacitor DC-DC conversion are investigated to enable on-chip power granularization. AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully.

This book presents state-of-the-art techniques for radiation hardened high-resolution Time-to-Digital converters and low noise frequency synthesizers. Throughout the book, advanced degradation mechanisms and error sources are discussed and several ways to prevent such errors are presented. An overview of the prerequisite physics of nuclear interactions is given that has been compiled in an easy to understand chapter. The book is structured in a way that different hardening techniques and solutions are supported by theory and experimental data with their various tradeoffs.Based on leading-edge research, conducted in collaboration between KU Leuven and CERN, the European Center for Nuclear ResearchDescribes in detail advanced techniques to harden circuits against ionizing radiationProvides a practical way to learn and understand radiation effects in time-based circuitsIncludes an introduction to the underlying physics, circuitdesign, and advanced techniques accompanied with experimental data

This book focuses on the design of a Mega-Gray (a standard unit of total ionizing radiation) radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) system used in a gamma-radiation environment. Several radiation-hardened-by-design (RHBD) techniques are demonstrated throughout the design of the TDC and other circuit techniques to improve the TDC's resolution in a harsh environment are also investigated. Readers can learn from scratch how to design a radiation-tolerant IC. Information regarding radiation effects, radiation-hardened design techniques and measurements are organized in such a way that readers can easily gain a thorough understanding of the topic. Readers will also learn the design theory behind the newly proposed delta-sigma TDC. Readers can quickly acquire knowledge about the design of radiation-hardened bandgap voltage references and low-jitter relaxation oscillators, which are introduced in the content from a designer's perspective. · Discusses important aspects of radiation-tolerant analog IC design, including realistic applications and radiation effects on ICs; · Demonstrates radiation-hardened-by-design techniques through a design-test-radiation assessment practice;· Describes a new type of Time-to-Digital (TDC) converter designed for radiation-tolerant application;· Explains the design and measurement of all functional blocks (e.g., bandgap reference, relaxation oscillator) in the TDC.

This book describes synergetic innovation opportunities offered by combining the field of power conversion with the field of integrated circuit (IC) design. The authors demonstrate how integrating circuits enables increased operation frequency, which can be exploited in power converters to reduce drastically the size of the discrete passive components. The authors introduce multiple power converter circuits, which are very compact as result of their high level of integration. First, the limits of high-power-density low-voltage monolithic switched-capacitor DC-DC conversion are investigated to enable on-chip power granularization. AC-DC conversion from the mains to a low voltage DC is discussed, enabling an efficient and compact, lower-power auxiliary power supply to take over the power delivery during the standby mode of mains-connected appliances, allowing the main power converter of these devices to be shut down fully.

This book focuses on the design of a Mega-Gray (a standard unit of total ionizing radiation) radiation-tolerant ps-resolution time-to-digital converter (TDC) for a light detection and ranging (LIDAR) system used in a gamma-radiation environment. Several radiation-hardened-by-design (RHBD) techniques are demonstrated throughout the design of the TDC and other circuit techniques to improve the TDC's resolution in a harsh environment are also investigated. Readers can learn from scratch how to design a radiation-tolerant IC. Information regarding radiation effects, radiation-hardened design techniques and measurements are organized in such a way that readers can easily gain a thorough understanding of the topic. Readers will also learn the design theory behind the newly proposed delta-sigma TDC. Readers can quickly acquire knowledge about the design of radiation-hardened bandgap voltage references and low-jitter relaxation oscillators, which are introduced in the content from a designer's perspective. · Discusses important aspects of radiation-tolerant analog IC design, including realistic applications and radiation effects on ICs; · Demonstrates radiation-hardened-by-design techniques through a design-test-radiation assessment practice;· Describes a new type of Time-to-Digital (TDC) converter designed for radiation-tolerant application;· Explains the design and measurement of all functional blocks (e.g., bandgap reference, relaxation oscillator) in the TDC.

This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors’ systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes.

This book provides insight into organic electronics technology and in analog circuit techniques that can be used to increase the performance of both analog and digital organic circuits. It explores the domain of organic electronics technology for analog circuit applications, specifically smart sensor systems. It focuses on all the building blocks in the data path of an organic sensor system between the sensor and the digital processing block. Sensors, amplifiers, analog-to-digital converters and DC-DC converters are discussed in detail. Coverage includes circuit techniques, circuit implementation, design decisions and measurement results of the building blocks described.

CMOS DC-DC Converters aims to provide a comprehensive dissertation on the matter of monolithic inductive Direct-Current to Direct-Current (DC-DC) converters. For this purpose seven chapters are defined which will allow the designer to gain specific knowledge on the design and implementation of monolithic inductive DC-DC converters, starting from the very basics.

This book describes the design of optical receivers that use the most economical integration technology, while enabling performance that is typically only found in very expensive devices. To achieve this, all necessary functionality, from light detection to digital output, is integrated on a single piece of silicon. All building blocks are thoroughly discussed, including photodiodes, transimpedance amplifiers, equalizers and post amplifiers.

This book provides a detailed analysis of all aspects of capacitive DC-DC converter design: topology selection, control loop design and noise mitigation. Readers will benefit from the authors’ systematic overview that starts from the ground up, in-depth circuit analysis and a thorough review of recently proposed techniques and design methodologies. Not only design techniques are discussed, but also implementation in CMOS is shown, by pinpointing the technological opportunities of CMOS and demonstrating the implementation based on four state-of-the-art prototypes.

This book provides insight into organic electronics technology and in analog circuit techniques that can be used to increase the performance of both analog and digital organic circuits. It explores the domain of organic electronics technology for analog circuit applications, specifically smart sensor systems. It focuses on all the building blocks in the data path of an organic sensor system between the sensor and the digital processing block. Sensors, amplifiers, analog-to-digital converters and DC-DC converters are discussed in detail. Coverage includes circuit techniques, circuit implementation, design decisions and measurement results of the building blocks described.

Systematic Design of Analog IP Blocks introduces a design methodology that can help to bridge the productivity gap. Two different types of designs, depending on the design challenge, have been identified: commodity IP and star IP. Each category requires a different approach to boost design productivity. Commodity IP blocks are well suited to be automated in an analog synthesis environment and provided as soft IP. The design knowledge is usually common knowledge, and reuse is high accounting for the setup time needed for the analog library. Star IP still changes as technology evolves and the design cost can only be reduced by following a systematic design approach supported by point tools to relieve the designer from error-prone, repetitive tasks, allowing him/her to focus on new ideas to push the limits of the design. To validate the presented methodologies, three different industrial-strength applications have been selected and designed accordingly.

Environmental electromagnetic pollution has drastically increased over the last decades. The omnipresence of communication systems, various electronic appliances and the use of ever increasing frequencies, all contribute to a noisy electromagnetic environment which acts detrimentally on sensitive electronic equipment. Integrated circuits must be able to operate satisfactorily while cohabiting harmoniously in the same appliance, and not generate intolerable levels of electromagnetic emission, while maintaining a sound immunity to potential electromagnetic disturbances: analog integrated circuits are in particular more easily disturbed than their digital counterparts, since they don't have the benefit of dealing with predefined levels ensuring an innate immunity to disturbances. The objective of the research domain presented in EMC of Analog Integrated Circuits is to improve the electromagnetic immunity of considered analog integrated circuits, so that they start to fail at relevantly higher conduction levels than before.

This book describes new tools for front end analog designers, starting with global variation-aware sizing, and extending to novel variation-aware topology design. The tools aid design through automation, but more importantly, they also aid designer insight through automation. We now describe four design tasks, each more general than the previous, and how this book contributes design aids and insight aids to each. The ?rst designer task targeted is global robust sizing. This task is supported by a design tool that does automated, globally reliable, variation-aware s- ing (SANGRIA),and an insight-aiding tool that extracts designer-interpretable whitebox models that relate sizings to circuit performance (CAFFEINE). SANGRIA searches on several levels of problem dif?culty simultaneously, from lower cheap-to-evaluate “exploration” layers to higher full-evaluation “exploitation” layers (structural homotopy). SANGRIAmakes maximal use of circuit simulations by performing scalable data mining on simulation results to choose new candidate designs. CAFFEINE accomplishes its task by tre- ing function induction as a tree-search problem. It constrains its tree search space via a canonical-functional-form grammar, and searches the space with grammatically constrained genetic programming. The second designer task is topology selection/topology design. Topology selection tools must consider a broad variety of topologies such that an app- priate topology is selected, must easily adapt to new semiconductor process nodes, and readily incorporate new topologies. Topology design tools must allow designers to creatively explore new topology ideas as rapidly as possible.

LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers fits in the quest for complete CMOS integration of wireless receiver front-ends. With a combined discussion of both RF and ESD performance, it tackles one of the final obstacles on the road to CMOS integration. The book is conceived as a design guide for those actively involved in the design of CMOS wireless receivers. The book starts with a comprehensive introduction to the performance requirements of low-noise amplifiers in wireless receivers. Several popular topologies are explained and compared with respect to future technology and frequency scaling. The ESD requirements are introduced and related to the state-of-the-art protection devices and circuits. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers provides an extensive theoretical treatment of the performance of CMOS low-noise amplifiers in the presence of ESD-protection circuitry. The influence of the ESD-protection parasitics on noise figure, gain, linearity, and matching are investigated. Several RF-ESD co-design solutions are discussed allowing both high RF-performance and good ESD-immunity for frequencies up to and beyond 5 GHz. Special attention is also paid to the layout of both active and passive components. LNA-ESD Co-Design for Fully Integrated CMOS Wireless Receivers offers the reader intuitive insight in the LNA’s behavior, as well as the necessary mathematical background to optimize its performance. All material is experimentally verified with several CMOS implementations, among which a fully integrated GPS receiver front-end. The book is essential reading for RF design engineers and researchers in the field and is also suitable as a text book for an advanced course on the subject.